Project Name: Wafer Level Package Oriented 3D Detecting Technology

Project Owner: Shanghai Micro Electronic Equipment (Group) Co., Ltd.

Project Profile: Positioning: Research on 3D detecting technology based on multi-wave length interference, solve key technology of 3D detection, realize 3D detection for advanced package of typical semi-conductor, achieve Independent Intellectual Property Rights, foster R&D team of high-end detection products, lay technological foundation for afterward batch production and development. Targets: (1) Finish feasibility verification of 3D measuring technology based on multi-wave length interference. Meet the following technical indexes: the resolution of vertical measurement of 3D detection ≤ 0.2 um; and the resolution of horizontal measurement of 3D detection ≤4 um. (2) Upon the project research, achieve Independent Intellectual Property Rights of 3D detecting technology, and apply for three invention patents. (3) Upon the project development, establish 3D measurement project team, foster one system engineer, two integration engineers, two optical design engineers, and three algorithm engineers.

Contact Person: Zhang Yuyan

Phone Number: 021-24197967

E-mail: zhangyy@sstec.org.cn